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Vassoudevane Lebonheur

from Chandler, AZ
Age ~53

Vassoudevane Lebonheur Phones & Addresses

  • Chandler, AZ
  • Maricopa, AZ
  • 794 Maria Ln, Tempe, AZ 85284 (480) 705-4126
  • Urbana, IL
  • Champaign, IL
  • 443 W Aster Dr, Chandler, AZ 85248 (480) 705-4126

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Publications

Us Patents

Surface Treatment For Microelectronic Device Substrate

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US Patent:
6794225, Sep 21, 2004
Filed:
Dec 20, 2002
Appl. No.:
10/327645
Inventors:
Rahul Manepalli - Phoenix AZ
Terry Sterrett - Cave Creek AZ
Vassoudevane Lebonheur - Tempe AZ
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 2148
US Classification:
438127
Abstract:
Embodiments of the methods of the present invention provide a Molded Matrix Array Package (MMAP) carrier substrate panel that prevents underfill wetting in the inter-die areas. Surface treatments are provided via plasmas and/or patterned chemical depositions that reduce the surface free energy of the inter-die area to below the surface free energy of the underfill material. The surface treatments prevent the underfill material from wetting the carrier substrate panel and therefore encroachment upon the inter-die area. This provides a underfill material-free inter-die area allowing adhesion between the mold compound and carrier substrate.

Method Of Making A Microelectronic Assembly

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US Patent:
6908789, Jun 21, 2005
Filed:
Dec 15, 2003
Appl. No.:
10/737379
Inventors:
Vassoudevane Lebonheur - Tempe AZ,
Gregory J. Lemke - Phoenix AZ,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L021/44
H01L021/48
H01L021/50
US Classification:
438106
Abstract:
A method of making a microelectronic assembly is provided. Wetting and flow characteristics of a no-low underfill material are improved by preheating the no-flow underfill material. In one embodiment, the no-flow underfill material is preheated in a dispensing apparatus before being dispensed on a substrate. A die is then placed on the substrate, whereafter interconnection elements between the die and the substrate are reflowed and the no-flow underfill material is cured. In another embodiment, the no-flow underfill material is preheated after a die is placed on a substrate with the no-flow underfill material between the die and the substrate. In a further embodiment, a no-flow underfill material is dispensed on a die, whereafter a substrate is placed on the die with the no-flow underfill material between the substrate and the die.

Semiconductor Chip Package And Method Of Manufacturing Same

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US Patent:
6975025, Dec 13, 2005
Filed:
Dec 3, 2001
Appl. No.:
09/999169
Inventors:
Vassoudevane LeBonheur - Tempe AZ,
Debendra Mallik - Chandler AZ,
Eduardo J. Bolanos - Phoenix AZ,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L023/053
US Classification:
257700, 257707, 257777
Abstract:
A semiconductor chip package, an electronic system, and a method of manufacturing such package. A lower structure includes a lower insulating layer and a metal layer made of separate electrical conductors. A wall defines a cavity on the metal layer. Electrical conductors extend from the metal layer to contact points elsewhere in the semiconductor chip package. Conductor members are positioned on the electrical conductors of the metal layer. A semiconductor chip is positioned on the conductor members within the cavity, with an isolation area between the semiconductor chip and the wall. The electrical contacts on the semiconductor chip contact the conductor members to couple the semiconductor chip to the contact points. Underfill material is provided within the isolation area between the perimeter surface and the wall, and is prevented by the wall from spreading to other areas. Placement of the semiconductor chip within the cavity reduces the package thickness.

Vibratable Die Attachment Tool

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US Patent:
7147735, Dec 12, 2006
Filed:
Jul 22, 2004
Appl. No.:
10/897706
Inventors:
Terrence C. Caskey - Mesa AZ,
Vassoudevane Lebonheur - Tempe AZ,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
B32B 37/00
US Classification:
156 735, 156 736, 156580, 1565831
Abstract:
A die attachment includes a placement head, a platen, and a vibration mechanism to vibrate at least a selected one of the placement head and platen while a die and a substrate mounted on the placement head and the platen, respectively, are in contact.

Mold Compound Cap In A Flip Chip Multi-Matrix Array Package And Process Of Making Same

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US Patent:
7514300, Apr 7, 2009
Filed:
Oct 2, 2007
Appl. No.:
11/906594
Inventors:
Vassoudevane Lebonheur - Tempe AZ,
Richard J. Harries - Chandler AZ,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/56
US Classification:
438127, 257787, 257E21503, 257E21504, 29856
Abstract:
A molding compound cap structure is disclosed. A process of forming the molding compound cap structure is also disclosed. A microelectronic package is also disclosed that uses the molding compound cap structure. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the molding compound cap structure. The molding compound cap includes a configuration that exposes a portion of a microelectronic device.

Method Of Improving Thermal Performance In Flip Chip/integral Heat Spreader Packages Using Low Modulus Thermal Interface Material

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US Patent:
2003006, Apr 10, 2003
Filed:
Sep 28, 2001
Appl. No.:
09/964709
Inventors:
Vassoudevane Lebonheur - Tempe AZ,
Robert Starkston - Phoenix AZ,
International Classification:
H01L023/10
H01L023/34
US Classification:
257/706000
Abstract:
A microprocessor package and a method of dissipating heat therefrom have improved thermal performance by utilizing low modulus thermal interface material between the flip chip, central processing unit and a heat spreader in the package. A modulus of elasticity of the thermal interface material in the kPa range is preferably provided by a cured, filled polymer gel which is lightly crosslinked. The gel thermal interface material enables the package to have a post end-of-line and post reliability testing thermal resistance across the thermal interface material between the flip chip and the heat spreader of

Underfill Materials Dispensed In A Flip Chip Package By Way Of A Through Hole

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US Patent:
2003011, Jun 19, 2003
Filed:
Dec 19, 2001
Appl. No.:
10/033854
Inventors:
Mahesh Sambasivam - Chandler AZ,
Vassoudevane LeBonheur - Tempe AZ,
International Classification:
H01L021/44
H01L021/48
H01L021/50
US Classification:
438/108000, 438/613000, 438/126000, 438/127000
Abstract:
A microelectronic device and methods of fabricating the same comprising disposing an underfill material between a substrate and a flip chip by providing a hole through the substrate wherein the underfill material is injected therethrough.

Mold Compound Cap In A Flip Chip Multi-Matrix Array Package And Process Of Making Same

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US Patent:
2004026, Dec 30, 2004
Filed:
Jun 30, 2003
Appl. No.:
10/612764
Inventors:
Vassoudevane Lebonheur - Tempe AZ,
Richard Harries - Chandler AZ,
Assignee:
Intel Corporation
International Classification:
H01L021/48
H01L023/52
US Classification:
257/778000, 438/108000, 257/782000, 438/118000
Abstract:
A molding compound cap structure is disclosed. A process of forming the molding compound cap structure is also disclosed. A microelectronic package is also disclosed that uses the molding compound cap structure. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the molding compound cap structure. The molding compound cap includes a configuration that exposes a portion of a microelectronic device.
Vassoudevane Lebonheur from Chandler, AZ, age ~53 Get Report